The present application claims priority to Japanese Application No. P11-042769 filed Feb. 22, 1999 which application is incorporated herein by reference to the extent permitted by law.
1. Field of the Invention
The present invention relates to a method of producing a semiconductor device, more particularly relates to a method of producing a semiconductor device enabling the semiconductor device and substrate contacts to be formed on an SOI substrate by a simplified process.
2. Description of the Related Art
In recent semiconductor devices, SOI (silicon-on-insulator or semiconductor-on-insulator) substrates enabling a decrease in the junction capacitance of a conventional semiconductor device and an improvement in its performance have become increasingly important. A semiconductor device formed on an SOI substrate has several advantages compared with a semiconductor device formed on a bulk substrate not containing an insulator layer between semiconductor layers.
In the case of forming, for example, a MOSFET on an SOI substrate, fluctuation of a threshold voltage accompanying fluctuation of a source potential (substrate potential effect) can be prevented. It is also possible to reduce the capacitance of an impurity diffusion layer since the bottom surface of the impurity diffusion layer formed in a transistor contacts the insulator layer of the SOI substrate, for example.
As mentioned above, in the case of forming a semiconductor device on an SOI substrate, a substrate terminal connected to the silicon layer under the insulator layer is required. For example, in the case of forming a MOSFET, in addition to three terminals of the gate, source, and drain, it is necessary to form the substrate terminal able to affect the threshold voltage etc.
Below, an explanation will be given of a method of producing a semiconductor device including a substrate terminal on an SOI substrate with reference to FIG. 3 and FIG. 4.
First, as shown in FIG. 3A, an SOI substrate comprising a bulk silicon substrate 1 over which is stacked, via an insulating layer 2, a semiconductor layer (silicon layer) 3 is produced. As the method of forming the SOI substrate, the method of growing single crystalline silicon on an insulating layer by a gas phase, liquid phase, or solid phase, the method of bonding substrates, the silicon implanted oxidation (SIMOX) method of implanting oxygen ions into a single crystalline silicon substrate to form an insulating layer inside it, and a method of partially increasing the porosity of silicon and oxidizing it by anodic oxidation can be mentioned.
Next, as shown in FIG. 3B, part of the silicon layer 3 is selectively converted to silicon oxide to form an element isolation region 4. The element isolation region 4 is formed, for example, by the LOCOS method of forming a silicon nitride film (not shown) on the silicon layer 3 and then heat oxidizing the silicon layer 3 using the silicon nitride layer as a mask. Alternatively, it is also possible to form the element isolation layer 4 by the shallow trench isolation (STI) method of etching the silicon layer 3 to form a trench and then forming an oxide film so as to fill the trench.
Further, a p-type or n-type impurity is introduced in the silicon substrate 1 to form a well 5.
Next, as shown in FIG. 3C, a gate insulating layer 6 comprised of silicon oxide, for example, is formed on the surface of the silicon layer 3 and a gate electrode 7 comprised of a conductor is formed on the layer 3. After the gate electrode 7 is formed, ion-implantation is performed using the gate electrode as a mask to form source/drain regions 8 by self-alignment.
Next, as shown in FIG. 4A, an interlayer insulating layer 9 comprised of a silicon oxide film is formed over the entire surface. Next, for forming electrodes connected to the source/drain regions 8 or the well 5 formed in the silicon substrate 1, contact holes 10 are formed in the interlayer insulating layer 9.
After this, as shown in FIG. 4B, an impurity is ion-implanted in a high concentration into the contacts to form a high concentration impurity diffusion layer 11 at the surface of the well 5. Due to this, an ohmic contact is obtained and the contact is decreased in resistance.
Summarizing the problems to be solved by the invention, as shown in the above conventional methods of production, the practice for forming the substrate terminal of an SOI substrate had been to form an interlayer insulating layer covering the MOSFET or other transistor, then form the contact together with the gate, source, drain, etc. or separate from the gate, source, drain, etc. The substrate is usually doped with an n-type or p-type impurity in a low concentration. Ions are implanted into the contact to form a high concentration impurity diffusion layer under the contact and thereby obtain an ohmic contact.
In the case of forming both an n-channel transistor and a p-channel transistor on a substrate, it is necessary to introduce impurities to n-type and p-type contacts respectively. Therefore, the photolithography step for implanting ions into the contacts is performed twice.
Although a semiconductor device formed on an SOI substrate exhibits excellent performance, there has been the defect of the remarkably high cost for producing an SOI substrate compared with a bulk substrate in which an insulating layer is not inserted. Therefore, in the case of forming a semiconductor device on an SOI substrate, it is necessary to simplify the process to reduce the cost of producing the semiconductor device.
An object of the present invention is to provide a method of producing a semiconductor device enabling a semiconductor device to be formed on an SOI substrate by a simplified process.
According to the present invention, there is p provided a method of producing a semiconductor device for forming a transistor on a substrate having a first semiconductor layer, an Insulating layer formed on the first semiconductor layer, and a second semiconductor layer formed on the insulating layer, comprising the steps of forming an element Isolation region connected to the insulating layer at the bottom at least at a part of the second semiconductor layer; forming an opening connected to the first semiconductor layer In the element isolation region; forming a gate electrode having a gate insulating layer and a conductor on the second semiconductor layer; introducing an impurity in the second semiconductor layer and in the opening to form source/drain regions in the second semiconductor layer and to form a high concentration impurity diffusion region at the bottom of the opening in the first semiconductor layer; forming an interlayer insulating layer at least on the element isolation region and on the transistor forming region; and forming contact holes connected to the source/drain regions, the gate electrode, and the high concentration impurity diffusion region in the interlayer insulating layer.
Preferably, the first semiconductor layer and the second semiconductor layer comprise silicon and the substrate comprises an SOI (silicon on insulator) substrate.
Preferably, the step of forming the element isolation region comprises the steps of forming a silicon nitride layer in a predetermined pattern on the second semiconductor layer; heat-oxidizing the second semiconductor layer using the silicon nitride layer as a mask; and removing the silicon nitride layer.
Alternatively, preferably, the step of forming the element isolation region comprises the steps of forming an element isolation trench by removing at least a part of the second semiconductor layer to expose the insulating layer and forming a silicon oxide layer to fill the element isolation trench.
Alternatively, preferably, the step of forming the element isolation region comprises a step of removing at least a part of the second semiconductor layer to expose the insulating layer.
Preferably, the step of forming the opening in the element isolation region comprises a step of removing the element isolation region and the insulating layer by etching.
Preferably, the step of forming the source/drain regions comprises the steps of introducing an impurity in a relatively low concentration in the second semiconductor layer to form LDD (lightly doped drain) regions; forming sidewalls having an insulating layer on side faces of the gate electrode; and introducing an impurity in a relatively high concentration in the second semiconductor layer using the sidewalls as a mask to form source/drain regions.
Preferably, after forming the source/drain regions in the second semiconductor layer and forming the high concentration impurity diffusion region at the bottom of the opening in the first semiconductor layer, the method further comprises the steps of forming a refractory metal layer over the entire surface; performing heat treatment to silicide the refractory metal layer; and removing the part of the refractory metal layer which is not silicided.
Due to this, it is possible to reduce the photolithography step conventionally performed twice to once. In the conventional method of producing a semiconductor device, after forming contact holes in the interlayer insulating layer, ions are implanted into the bottom of the contact holes. Therefore, two photolithography steps are required for a p-type impurity diffusion region and an n-type impurity diffusion region.
On the other hand, according to the method of producing a semiconductor device of the present invention, the ion-implantation into the substrate contact is performed at the same time as the high concentration ion-implantation to form the source/drain regions. Therefore, it is possible to reduce the number of photolithography steps and simplify the process and it is also possible to reduce the production costs of semiconductor devices.